Mixed-Dimensional Contact Architecture to WSe2 for Efficient Hole Injection (2025)

Abstract

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Si-based electronic devices face inherent performance limitations at the nanoscale, primarily due to short-channel effects and interface defects. As a result, transition-metal dichalcogenides (TMDs) have emerged as promising alternatives, offering unique advantages such as dangling-bond-free surfaces and tunable bandgaps. Among TMDs, tungsten diselenide (WSe₂) has garnered significant attention as a p-type semiconductor owing to its high hole mobility and favorable surface chemistry. However, its practical implementation is often hindered by Fermi-level pinning at metal contacts, leading to high contact resistance and limited carrier injection efficiency. In this study, we present a mixed-dimensional contact architecture that integrates one-dimensional (1D) edge contacts and two-dimensional (2D) surface contacts to enhance hole injection in WSe₂ field-effect transistors (FETs). By controlling the ratio of the 1D/2D contact architecture, the optimal edge/surface contact ratio from the fabricated WSe₂ FET was obtained when the ratio 1D-length/2D-area = 0.26, exhibiting high field-effect hole mobility (171 cm²/V·s) and low specific contact resistance (2.97 kΩ·μm). Ultraviolet/ozone treatment was employed to form tungsten oxide uniformly at the contact regions, facilitating hole doping and thereby reducing contact resistance. The fabricated WSe₂ FETs demonstrated a high current on/off ratio of 5 × 10⁸ and excellent Ohmic contact behavior, with an extracted Schottky barrier height of 0.09 eV. These findings feature the effectiveness of the mixed-dimensional contact architecture in optimizing carrier injection and overcoming the challenges associated with conventional contact schemes. By utilizing the complementary benefits of edge and surface contacts, this approach offers a promising strategy for achieving high-performance TMD-based complementary metal-oxide-semiconductor devices, paving the way for next-generation atomically thin electronic applications.

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